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Espressif Systems /ESP32-C6 /PARL_IO /INT_ST

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Interpret as INT_ST

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31282724232019161512118743000000000000000000000000000000000000000000 (TX_FIFO_REMPTY_INT_ST)TX_FIFO_REMPTY_INT_ST0 (RX_FIFO_WFULL_INT_ST)RX_FIFO_WFULL_INT_ST0 (TX_EOF_INT_ST)TX_EOF_INT_ST

Description

Parallel IO interrupt singal status register.

Fields

TX_FIFO_REMPTY_INT_ST

The masked interrupt status of TX_FIFO_REMPTY_INTR.
RX_FIFO_WFULL_INT_ST

The masked interrupt status of RX_FIFO_WFULL_INTR.
TX_EOF_INT_ST

The masked interrupt status of TX_EOF_INTR.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data